Product Summary
The CY62126VLL-70ZI is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. The CY62126VLL-70ZI has an automatic power-down feature that significantly reduces power consumption by 99% when deselected. The device enters power-down mode when CE is HIGH. The CY62126VLL-70ZI is available in standard 44-pin TSOP Type II (forward pinout) and fBGA packages.
Parametrics
CY62126VLL-70ZI absolute maximum ratings: (1)Storage Temperature:–65℃ to +150℃; (2)Ambient Temperature with Power Applied:–55℃ to +125℃; (3)Supply Voltage on VCC to Relative GND:–0.5V to +4.6V; (4)DC Voltage Applied to Outputs in High Z State:–0.5V to VCC +0.5V; (5)DC Input Voltage:–0.5V to VCC +0.5V; (6)Current into Outputs (LOW): 20mA; (7)Static Discharge Voltage (per MIL-STD-883, Method 3015): >2001V; (8)Latch-Up Current: >200mA.
Features
CY62126VLL-70ZI features: (1)2.7V to 6V operation; (2) CMOS for optimum speed/power; (3) Low active power (70 ns, LL version) 54mW (max.) (15mA); (4) Low standby power (70 ns, LL version) 54μW (max.) (15μA); (5) Automatic power-down when deselected; (6)Independent control of Upper and Lower Bytes; (7) Available in 44-pin TSOP II (forward) and fBGA.
Diagrams
CY62126EV30LL-45ZSXAT |
Cypress Semiconductor |
SRAM 1024KB 45ns 1.3mA |
Data Sheet |
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CY62126EV30LL-55ZSXE |
Cypress Semiconductor |
SRAM 1M MOBL ULTRA Lo PWR HI SPD ASYNC SRAM |
Data Sheet |
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CY62128ELL-45ZXIT |
Cypress Semiconductor |
SRAM 1M MOBL ULTRA LO PWR HI SPD IND |
Data Sheet |
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CY62128BNLL-70SXE |
Cypress Semiconductor |
SRAM SLO 5.0V SUPER LO PWR 128K X 8 SRAM |
Data Sheet |
Negotiable |
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CY62128DV30LL-55SXI |
IC SRAM 1MBIT 55NS 32SOIC |
Data Sheet |
Negotiable |
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CY62128DV30LL-70SI |
IC SRAM 1MBIT 70NS 32SOIC |
Data Sheet |
Negotiable |
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