XC9572-10PQ100C

high-performance CPLD, 100-PQFP, High-drive 24 mA outputs, 3.3 V or 5 V I/O capability

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Price:: US $5.00~20.00 / piece [Get Latest Price]

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	US $5.00~20.00

PartNumber:: XC9572-10PQ100C

Brand:: Xilinx, Inc - Xilinx | Pack: DIP | D/C: 00+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-09-17

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Part Number:XC9572-10PQ100C
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Product Summary

The XC9572-10PQ100C is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. The XC9572-10PQ100C is comprised of four 36V18 Function Blocks, providing 1,600 usable gates with propagation delays of 7.5 ns.

Parametrics

XC9572-10PQ100C absolute maximum ratings: (1)Supply voltage relative to GND:-0.5V to 7.0V; (2)DC input voltage relative to GND:-0.5V to VCC + 0.5V; (3)Voltage applied to 3-state output with respect to GND:-0.5V to VCC + 0.5V; (4)Storage temperature:-65℃ to +150℃; (5)Max soldering temperature (10 s @ 1/16 in = 1.5 mm):+260℃.

Features

XC9572-10PQ100C features: (1)Extensive IEEE Std 1149.1 boundary-scan (JTAG) support; (2)Programmable power reduction mode in each macrocell; (3)Slew rate control on individual outputs; (4)User programmable ground pin capability; (5)Extended pattern security features for design protection; (6)High-drive 24 mA outputs; (7)3.3 V or 5 V I/O capability; (8)Advanced CMOS 5V FastFLASH technology; (9)Supports parallel programming of more than one XC9500 concurrently; (10)Available in 44-pin PLCC, 84-pin PLCC, 100-pin PQFP and 100-pin TQFP packages; (11)90 product terms drive any or all of 18 macrocells within Function Block; (12)Global and product term clocks, output enables, set and reset signals; (13)Enhanced pin-locking architecture; (14)7.5 ns pin-to-pin logic delays on all pins; (15)fCNT to 125 MHz; (16)72 macrocells with 1,600 usable gates; (17)Up to 72 user I/O pins; (18)5 V in-system programmable (ISP).